The Simple Differential OTA
Verification
Christian Enz
Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland
Initialization¶
Introduction¶
Schematic of the simple differential OTA.
This notebook presents the verification of the design of the simple differential OTA shown above and that was performed in the Design Notebook.
We will first load the process parameters and the specifications. We then will load the bias and the transistors information to evaluate the open-loop transfer function and compare it to the theoretical results obtained in the Design Notebook. We then will check the noise and compare it to the theoretical results obtained in the Design Notebook.
OTA Characteristics¶
We now will read the results of the sizing procedure performed in the Design Notebook from the Excel file and check whether the specs are achieved.
Sizing summary¶
Process parameters¶
Specifications¶
Bias information¶
Transistors information¶
Open-loop gain¶
The $GBW$ given above is only an estimation. We can find the $actual $GBW$ accounting for the non-dominant pole using the following script.
In this case the actual $GBW$ is very close to the estimated one.
We can plot the magnitude and phase of the open-loop gain.
Input-referred noise¶
We can now calculate the noise excess factor of the OTA and the input-referred thermal noise resistance.
We see that the OTA thermal noise excess factor is only slightly larger than that of the differential pair. This is due to the rather large $G_{m1}/G_{m2}$ ratio.
We can now compute the input-referred flicker noise and the corner frequency.
We can plot the input-reffered noise
Input-referred offset¶
The variance of the input-referred offset is given by \begin{equation} \sigma_{V_{os}}^2 = \left(\frac{I_b}{G_{m1}}\right)^2 \left(\sigma_{\beta_1}^2 + \sigma_{\beta_2}^2\right) + \left(\frac{G_{m2}}{G_{m1}}\right)^2 \sigma_{V_{T02}}^2 + \sigma_{V_{T01}}^2, \end{equation} where \begin{align} \sigma_{\beta_i}^2 &= \frac{A_{\beta}^2}{W_i L_i} \qquad i=1,2,\\ \sigma_{V_{T0i}}^2 &= \frac{A_{VT}^2}{W_i L_i} \qquad i=1,2. \end{align} From the values ocalaculated above we get
Simulation results from Smash¶
The theoretical results can be compared with results obtained from simulations performed with Smash. The cells below will run the simulations with Smash. In order to run the simulations you need to have Smash installed in the default directory.
Saving parameter file¶
We first write the parameter file including all the bias, component values and transistor sizes for this specific design for running the Smash simulations.
Operating point¶
To start we need to check the quiescent voltages and currents and the operating points of all transistors by running a .OP simulation.
We can check the operating point information looking the .op file.
Looking at the .op file, we see that all transistors are in saturation. We also see that the quiescent output voltage is given by
which is close to the input common mode $V_{ic}=0.9\,V$. This confirms that the OTA is not saturated by its proper systematic offset. We can now proceed with the DC simulation.
Large-signal differential transfer characteristic¶
We now simulate the large-signal differential transfer characteristic to extract the output voltage swing.
The extracted output voltage swing does actually not correspond to the swing of the linear part. We need to zoom into the linear gain region.
The output voltage swing is actually even smaller than the one extracted above. It is about $V_{swing}=0.55\,V$ which is rather small. We will see that the output swing can be extended with different OTA architectures.
The offset voltage needed to bring the output voltage to $V_{ic}$ is extracted as $V_{os}=18.5\,\mu V$. We save it to the bias information file for further AC simulations.
Open-loop gain¶
After having checked the operating point information and making sure that the OTA output is not saturated by extracting the required offset voltage for bringing the output operating point to $V_{ic}$, we can now perform the AC simulation.
We see a very good match between the small-signal simulations and the theoretical results except at higher frequency where additional poles due to parasitic capacitances that have not been accounted for introduce additional phase shift.
Input-referred noise¶
We can compare the theoretical input-referred noise to that obtained from simulations.
We can observe that the simulated input-referred noise perfectly the theoretical prediction.
In Smash we can look at the thermal and flicker noise separately. We can compare the contributions of differential pair and the current mirror to the input-referred thermal noise PSD.
The contribution of the current mirror to the input-referred thermal noise PSD is about 7 dB lower (about 5 times lower) which is slightly lower than the value $1/\eta_{th} \cong 5.3$ obtained in the design phase. It is nevertheless large enough for the current mirror to contribute only marginally to the input-referred thermal noise.
We can also check the contributions of the differential pair and the current mirror to the input-referred flicker noise.
The situation is different for the input-referred flicker noise. Indeed, the current mirror is now dominating over the differential pair despite the large $G_{m1}/G_{m2}$ ratio. This is due to the flicker noise of the pMOS transistor being about 8 times larger than that of the nMOS for this given technology.
Input-referred offset voltage¶
The standard deviation of the random input-referred offset voltage can be simulated in Smash using Monte-Carlo (MC) simulation with 1000 runs. Note that the matching parameters have to be converted to dispersion parameters according to \begin{align*} SIGMAV &= \frac{A_{VT}}{\sqrt{2}},\\ SIGMAI &= \frac{A_{\beta}}{\sqrt{2}}. \end{align*} for both NMOS and pMOS.
MC simulation of the open-loop transfer characteristic for extracting the offset voltage.
The offset voltage is first extracted from the open-loop circuit as shown in the above figure. The results of the MC simulation is $\sigma_{Vos} = 1.07\,mV$ which is consistent with the dispersion simulation $\sigma_{Vos} = 1.05\,mV$ provided by Smash and close to the theoretical estimations $\sigma_{Vos} = 1.08\,mV$.
MC simulation using a closed-loop configuration for extracting the offset voltage.
For high gain amplifiers, it is also possible to measure the offset by putting the OPAMP in a closed loop as shown in the above figure. The results of the MC simulation is $\sigma_{Vos} = 1.07\,mV$ which is consistent with the dispersion simulation $\sigma_{Vos} = 1.05\,mV$ provided by Smash and close to the theoretical estimations $\sigma_{Vos} = 1.08\,mV$.
MC closed-loop simulation of the contributions of the differential pair and the current mirror to the input-referred offset.
Contribution of the various transistors to the input-referred offset is shown in the above figure. It confirms that the differential pair is the dominant contributor to the offset voltage.
Power consumption¶
The total power consumption is given by
Simulation results from ngspice¶
The theoretical results can also be compared with results obtained from simulations performed with ngspice. The cells below will run the simulations with ngspice. In order to run the simulations you need to have ngspice installed. Please refer to the moodel site for full instructions.
Saving parameter file¶
We first write the parameter file for this specific design for running the ngspice simulations.
Operating point¶
The voltages at the various circuit nodes are given below.
We see that the output voltage is actually set by the drain and gate voltage of M2a (voltage at node 2 v(2)) because the currents in the two branches are identical and therefore the drain voltages of M2b and M1b must be equal to the drain voltages of M2a and M1a. This means that M2b and M1b are in saturation. The quiescent output voltage is extracted below.
The operating point information for all transistors can be extracted from the .op file.
We can check the bias voltages and operating region of each transistor below.
All transistors are biased in saturation. The operating points looks fine. We can now proceed with the large-signal DC simulation.
Large-signal differential transfer characteristic¶
We now simulate the DC differential transfer characteristic. We can then extract the systematic offset voltage that is required to bring the output voltage back to $V_{ic}$.
We can now zoom into the high gain region to extract a more accurate value of the offset voltage.
The output voltage swing is actually even smaller than the one extracted above. It is about $V_{swing}=0.55\,V$ which is rather small. We will see that the output swing can be extended with different OTA architectures.
The offset voltage needed to bring the output voltage to $V_{ic}$ is extracted as $V_{os}=18.5\,\mu V$. We save it to the bias information file for further AC simulations.
Open-loop gain¶
After having checked the operating point information and making sure that the OTA output is not saturated, we can proceed with the open-loop gain simulation. Note that for higher DC gain OTAs, the output might saturate due to asymmetries in the operating points induced by output conductances. In this case, a DC input voltage (that corresponds to the DC value of parameter Vos of $V_{id}$ in the netlist) needs to be added in order to bring the output voltage to the desired quiescent voltage. It will not be the case for the simple OTA and we therefore can keep $V_{os}=0\,V$.
We see a very good match between the small-signal simulations and the theoretical results except at higher frequency where additional poles due to parasitic capacitances that have not been accounted for introduce additional phase shift.
Input-referred noise¶
We can compare the theoretical input-referred noise to that obtained from simulations.
We can observe that the simulated input-referred noise perfectly the theoretical prediction.
Unfortunately, with ngspice it is not that straightforward to separate thermal and flicker. It is also not that easy to see the contributions of individual transistors.
Conclusion¶
This notebook presented the verification of the design performed in the Design notebook using Smash simulations. The results obtained for the the open-loop transfer function are very close to the theoretical prediction. In particular the $GBW$ and phase margin are slightly larger than the target. The input referred-noise is also close. The input-referred thermal noise is very close to the theoretical estimation, whereas the simulation flicker noise is slightly lower than the theoretical estimation. This leads to a extracted corner frequency that is lower than the theoretical prediction.